On chip permanent analog parameter storage


This project tries to achieve the on chip storage of analog voltages with standard CMOS technology. We investigate floating gates to store charge permanently, even with the power supply turned of. We use the basic circuitry developed by Chris Diorio. Reid Harrison has been working on this same problem and has solutions to offer too.


We have working floating gate analog random access memories (FGaRAM) produced in two CMOS processes (2.0 mu ORBIT and 1.2 mu AMI (both available through the MOSIS service)) and will soon test a version in the 0.8 mu AMS (available through the EUROPRACTICE service). An early example is depicted below. It is an array of 28 aRAM cells, that fit along one side of a 2 micron 'tiny chip' (= 2mm x 2mm) and cover about 1/5 of the chip area. It was produced by the 2.0 mu ORBIT Process available through the MOSIS service. As a first application Christoph Rasche and myself designed a chip, that contains a Silicon Neuron that makes use of an array of stored voltages for its tuning. This chip is tested and works fine. This layout used to be available for download. Interested parties, please take contact. The package contains the memory array including an example of how to connect it to the pads. The pad-connections were also influenced by other circuitry that we put on that particular chip and you might want to change them. Contact me for detailed infos about the aRAM's use. There are 5 biases (mem_amp_bias, hv_switch_bias, 35V, 27V and hot_e_Vdd) necessary and 8 digital control bits (mux0-4, D, U and mem_\select).

I'm also happy to give away layout for the 1.2 AMI and 0.8 AMS process. In the 0.8 AMS i have automated the generation of arrays such that i can produce them with arbitrary spacing. Contact me if you are interested.

last update: 24.7.2000